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Cortex M1, Cortex R4 - comparison

Mullai Thiagu
Note: This was originally posted on 25th September 2009 at http://forums.arm.com

Hi all,

Iam studyng the features supported by Cortex M1 and Cortex R4 soft processors. I have created a table for this and there are some features which i could not find.... it would be helpful if you guys can fill the missing features
Parents
  • Note: This was originally posted on 25th September 2009 at http://forums.arm.com

    > Cortex R4 soft processors

    Hmm, Cortex R4 isn't a soft processor AFAIK - it's designed for ASIC silicon implementation.

    Cortex-M1 is designed for low gate count - it only supports the ARMv6M variant of the Thumb instruction set, has a very simple single issue pipeline, and no cache interface, and perhaps can run at 100MHz in a fast FPGA (not entirely sure, never used one).

    Cortex-R4 is designed for higher performance implementations in silicon - it supports ARM and Thumb instruction sets (more suitable for algorithmic work), has a dual-issue pipeline (two instructions per cycle peak), and targets around 400MHz. A very different beast indeed. As ttfn says, if you want more details it's best too look at the two architecture documents - there are lots of differences!



    Thanks for the reply...I am basically interested in hardware related details....I have listed the features i want to compare for Cortex M1 and Cortex R4...

    It would be great if you guys can fill the details against each feature ...

    Thanks in advance


             Features    
                                            
    1. Primary FPGA Target
    2. Max Core Frequency
    3. FPGA Logic Cells
    4. Hardware Multipliers
    5. Hardware Dividers
    6. Instruction Cache Size
    7. Data Cache Size
    8. Number of ports for Instruction TCM / TCM-A (for Cortex R4)
    9. Number of ports for Data TCM / TCM-B (for Cortex R4)
    10. Burst Size Setting for Cache
    11. Exception Checking (Divsion error)
    12. MPU present/absent
    13. MMU present/absent
    14. Maximum number of Interrupts supported
    15. Options to select JTAG debug level - present/absent
    16. Option to set Custom instructions - present/absent
    17. Option to Set memory for Exception Vector - present/absent
    18. Is a separate FPGA kit (evaluation version) available for Cyclone III FPGA
    19. If Yes, does the kit consist of:
         Soft Core
         Software development environment
         Simulation support (for full version)
    20. Tool for Software development
    21. AMBA Bus Support - present/absent
Reply
  • Note: This was originally posted on 25th September 2009 at http://forums.arm.com

    > Cortex R4 soft processors

    Hmm, Cortex R4 isn't a soft processor AFAIK - it's designed for ASIC silicon implementation.

    Cortex-M1 is designed for low gate count - it only supports the ARMv6M variant of the Thumb instruction set, has a very simple single issue pipeline, and no cache interface, and perhaps can run at 100MHz in a fast FPGA (not entirely sure, never used one).

    Cortex-R4 is designed for higher performance implementations in silicon - it supports ARM and Thumb instruction sets (more suitable for algorithmic work), has a dual-issue pipeline (two instructions per cycle peak), and targets around 400MHz. A very different beast indeed. As ttfn says, if you want more details it's best too look at the two architecture documents - there are lots of differences!



    Thanks for the reply...I am basically interested in hardware related details....I have listed the features i want to compare for Cortex M1 and Cortex R4...

    It would be great if you guys can fill the details against each feature ...

    Thanks in advance


             Features    
                                            
    1. Primary FPGA Target
    2. Max Core Frequency
    3. FPGA Logic Cells
    4. Hardware Multipliers
    5. Hardware Dividers
    6. Instruction Cache Size
    7. Data Cache Size
    8. Number of ports for Instruction TCM / TCM-A (for Cortex R4)
    9. Number of ports for Data TCM / TCM-B (for Cortex R4)
    10. Burst Size Setting for Cache
    11. Exception Checking (Divsion error)
    12. MPU present/absent
    13. MMU present/absent
    14. Maximum number of Interrupts supported
    15. Options to select JTAG debug level - present/absent
    16. Option to set Custom instructions - present/absent
    17. Option to Set memory for Exception Vector - present/absent
    18. Is a separate FPGA kit (evaluation version) available for Cyclone III FPGA
    19. If Yes, does the kit consist of:
         Soft Core
         Software development environment
         Simulation support (for full version)
    20. Tool for Software development
    21. AMBA Bus Support - present/absent
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