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Cache hit and miss

ManishKesarkar ManishKesarkar over 12 years ago

Note: This was originally posted on 16th September 2009 at http://forums.arm.com

Hi
I am using RVDS 4.0 I am running my code ARM926EJ-S RVISS core simulator.
Can anyone tell me is it possible to detect cache hit/ miss in simulator ? If so how to find cache hit/miss in simulator?
Regards,
Manish

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Martin Weidmann over 12 years ago

Note: This was originally posted on 17th September 2009 at http://forums.arm.com

You need to edit the default.ami configuration file for RVISS ($ARMROOT\RVARMulator\ARMulator\1.4.1\313\win_32-pentium). Find the this line:

Counters=false

Change it to true. Next time you connect to RVISS in RVD, find the CycleCount tab in the register pane.
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Martin Weidmann over 12 years ago

Note: This was originally posted on 17th September 2009 at http://forums.arm.com

You need to edit the default.ami configuration file for RVISS ($ARMROOT\RVARMulator\ARMulator\1.4.1\313\win_32-pentium). Find the this line:

Counters=false

Change it to true. Next time you connect to RVISS in RVD, find the CycleCount tab in the register pane.
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