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ARM7 totally RISC?

lesbattersbie lesbattersbie over 12 years ago

Note: This was originally posted on 9th May 2009 at http://forums.arm.com

Hi,

The ARM7 design does not follow the RISC features exactly and I understand this for most features except...
...with the size of the register bank.

I mean, what would be the consequence of changing the ARM7 register bank (16 registers) for a larger register bank with 32 registers?

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lesbattersbie lesbattersbie over 12 years ago

Note: This was originally posted on 12th May 2009 at http://forums.arm.com

Hi thanks for your reply!!

[font="Tahoma"]would impact operand encoding, either forcing the removal of condition code per instruction or inline shifted operands within the ARM7
hth
s.[/font]

Why would this be a result of having more registers?
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lesbattersbie lesbattersbie over 12 years ago

Note: This was originally posted on 12th May 2009 at http://forums.arm.com

Hi thanks for your reply!!

[font="Tahoma"]would impact operand encoding, either forcing the removal of condition code per instruction or inline shifted operands within the ARM7
hth
s.[/font]

Why would this be a result of having more registers?
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Vote up 0 Vote down

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