Please note: We are aware of an issue affecting replies on the Arm Community forums, which may not be loading as expected.
We apologize for any inconvenience and appreciate your patience while we investigate and work to resolve the issue.
Thank you for your understanding.
Model Parameters taken: -C cluster0.NUM_CORES=2 -C bp.secure_memory=false
Using the same process, I was able to run the project on A53 and A720. Here it stops and doesn't print anything.
Hello Sonu,
I think I have replicated your issue.
Stepping through the init code, I saw it hit on an access to a SIMD q register, which was trapped by CPTR_EL3 TFP bit.
https://developer.arm.com/documentation/101430/0102/Register-descriptions/AArch64-system-registers/CPTR-EL3--Architectural-Feature-Trap-Register--EL3
You should add init code to clear this register (see the supplied example startup_Cortex-A78MPCore_AC6 project), or you can quickly clear this on the debugger register view or command line (or add to your script for disabling semihosting):
set semihosting enabled off set var $AARCH64::$System::$Secure::$CPTR_EL3.TFP = 0
I see that this bit is clear by default on the Cortex-A720 FVP, hence you did not encounter this.
Regards
Ronan
Thanks Ronan,It is working by doing this.