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[color="#FF0000"]C code:[/color] unsigned long long *index; index = (unsigned long long *)0x20000102; // non-aligned(64-bits ) *index = 0x100;[color="#FF0000"]the Disassembly Code:[/color] LDR.W r8,[pc,#148] ADR r1,{pc}+2 LDM r1,{r0-r1} STRD r0,r1,[r8,#0] // hard-fault occur
[color="#FF0000"]C code:[/color] unsigned int *index; index = (unsigned int *)0x20000102; // non-aligned(32-bits ) *index = 0x100;[color="#FF0000"]the Disassembly Code:[/color] LDR.W r8,[pc,#148] MOVS r0,#0x100 STR r0,[r8,#0x00]
I know the Cortex-M3(ARM-V7) support non-align access,the align access of 32-bits and 64-bits is OK.but why 32-bits non-align can pass,and 64-bits non-Align can't? where is the difference of word and double-words access ?
Look at section A3.2.1 of the Architecture Reference Manual (V7M). There are still some alignment limitations.The following data accesses always generate an alignment fault:"¢ Non halfword-aligned LDREXH and STREXH"¢ Non word-aligned LDREX and STREX"¢ Non word-aligned LDRD, LDMIA, LDMDB, POP, and LDC"¢ Non word-aligned STRD, STMIA, STMDB, PUSH, and STCSo your 32-bit code is OK with non-aligned pointer, but the 64-bit code is not.