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DS5 streamline DDR DMA Access

vis

Hi

I am using DS5 streamline to analyse DDR access in a Cortex-A7 based SOC(Telechips).

I assume streamline is showing the memory access by CPU.

Is there any way to analyze DDR access by DMA in the SOC using streamline?

Regards

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    Hi vis, 

    We don't support this out-of-the-box, as DMA counter access isn't standardized in Linux. Streamline data capture is designed to be extensible, if the DMA controller supports counters and its driver exposes them. Custom countners can be added either as Perf uncore counters or via FTrace. See the User Guide for details. 

    Kind regards, 
    Pete

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  • 0

    Hi vis, 

    We don't support this out-of-the-box, as DMA counter access isn't standardized in Linux. Streamline data capture is designed to be extensible, if the DMA controller supports counters and its driver exposes them. Custom countners can be added either as Perf uncore counters or via FTrace. See the User Guide for details. 

    Kind regards, 
    Pete

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