arm r5 compiler config

Sorry I obviously don't know your concerns. I thought you were concerned about interrupt latency. But you seem to be talking about either LDM not loading data or about the system hanging either because of hardware failing or some software bug, I'm not sure which.

It is possible to make LDM not abandon loading by setting DILSM in the auxillary control register. What the low interrupt latency does is allow LDM or STM to be abandoned after they have started. If an interrupt happens and one of those operations are abandoned the processor makes it look like they never started - except some of the memory operations may actually complete. The pc will be as if the instruction is the next to execute and the stack pointer won't have been incremented or decremented. The operation will start from the beginning on return from the interrupt including doing again any memory transfers that were already done.

Sorry I obviously don't know your concerns. I thought you were concerned about interrupt latency. But you seem to be talking about either LDM not loading data or about the system hanging either because of hardware failing or some software bug, I'm not sure which.

It is possible to make LDM not abandon loading by setting DILSM in the auxillary control register. What the low interrupt latency does is allow LDM or STM to be abandoned after they have started. If an interrupt happens and one of those operations are abandoned the processor makes it look like they never started - except some of the memory operations may actually complete. The pc will be as if the instruction is the next to execute and the stack pointer won't have been incremented or decremented. The operation will start from the beginning on return from the interrupt including doing again any memory transfers that were already done.