Hi All,
Can we configure r5 compiler to turn of using LDM instructions. I just want to use multiple LD instructions instead of one LDM.
Thanks in advance.
Best,
Patrick
Thanks for your question.
If you are referring to any of the compilers from ARM, then no this not a supported option.
I hope this helps.
Chris
LDM and STM operations are abandoned by default though if an interrupt occurs and then restarted on return from the interrupt. I guess that's the sort of thing that's worrying you. See
CORTEX-R versus CORTEX-M
where they talk about what happens a bit more
Plus there is a --split_ldm option but I don't think you should need that but it can be used with the system setting to stop ldm and stm being abandoned rather than them both facilities being used.
Thanks Chris.
Hi Daith,
You know my concerns. My ARM-R4 can be hanged when using LDM. I have done some simulation about this. But even I can interrupt LDM, I cannot issue transaction through AXI-M in R4. When i said R4 is hanged, I mean R4 fires LDM and never get any data back. Can it because ARM LSU is stopped because of the hang? Do you think this is true?
Thanks,
Sorry I obviously don't know your concerns. I thought you were concerned about interrupt latency. But you seem to be talking about either LDM not loading data or about the system hanging either because of hardware failing or some software bug, I'm not sure which.
It is possible to make LDM not abandon loading by setting DILSM in the auxillary control register. What the low interrupt latency does is allow LDM or STM to be abandoned after they have started. If an interrupt happens and one of those operations are abandoned the processor makes it look like they never started - except some of the memory operations may actually complete. The pc will be as if the instruction is the next to execute and the stack pointer won't have been incremented or decremented. The operation will start from the beginning on return from the interrupt including doing again any memory transfers that were already done.