I've been playing around with MTE and BTI, and I was wondering if there was some way to do performance benchmarking on applications that use instructions from these instruction sets. I see that FVP supports up to ARM 8.5, but to my knowledge FVP isn't cycle accurate. If I can't emulate these instructions accurately, maybe someone knows of a way to get a rough estimate of the number of cycles each instruction might consume? Similar work has been done with pointer authentication instructions, in which a cycle count was estimated for the PAC* and AUT* instructions based on the nature of QARMA.
Thanks a lot! Actually I've downloaded the Fast Model and found that I can compile the code under the directory ../ARM/FastModelsPortfolio_11.11/examples/LISA/FVP_Base/Build_Cortex-A78x1. I got executable Linux64-Debug-GCC-7.3/isim_system, but when executing the model, I got the error information "Error: license error: License checkout for feature SG_Simulator with version 11.11 has been denied by Flex back-end.". Anyway, is the compiled output the Cortex-A78 FVP? I just need to import the model in debug configuration right? Thanks again!!
Hi Harper,Sorry, yes, the Armv8-A Core FVPs are license-managed, like the other models on that web page.
Please send an email to license.support@arm.com to request a license.For other Models-specific questions, please use the "Simulation Models" forum at community.arm.com/.../simulation-modelsStephen