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ARMv8 Foundation Model GICv2 Address Map Overlap?

Bill Peckham

Hi,

I'm looking at the ARMv8 Foundation Model User Guide (ARM DUI 0677C). In section 3.1, Memory Map, the following data appears regarding the address of GICv2 registers:

0x00_2C00_0000 0x00_2C00_1FFF, GIC Physical CPU interface, GICC, 8KB

0x00_2C00_1000 0x00_2C00_1FFF, GIC Distributor, GICD, 4KB

This makes it look like the GICC registers overlap the GICD registers. Since the GICC really only extends to 0x1003, I guess the GICC registers would overlap by only four bytes.

It appears that by reading the GICD_IIDR register that the GICD really is at 0x2C00_1000, but I haven't gone further to characterize the behavior of the register at 0x2C00_1000, which is either the GICC_DIR or the GICC_CTLR.

So my question: Is the documentation wrong? Is the model wrong?

Thanks,

Bill

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  • 0 Arm Employee Badge

    > I'm looking at the ARMv8 Foundation Model User Guide (ARM DUI 0677C).

    > In section 3.1, Memory Map, the following data appears regarding the 

    > address of GICv2 registers:

    >

    > 0x00_2C00_0000 0x00_2C00_1FFF, GIC Physical CPU interface, GICC, 8KB

    > 0x00_2C00_1000 0x00_2C00_1FFF, GIC Distributor, GICD, 4KB

    I think there is a slight confusion here about what the User Guide is

    referring to. Basically, the ARMv8 Foundation model can use both GICv2

    and GICv3. By default, it will use the GICv2 memory map unless "--gicv3"

    option is specified.

    > 0x00_2C00_0000 0x00_2C00_1FFF, GIC Physical CPU interface, GICC(b),

    8KB

    This is for the GICv3 CPU Interface registers and not the GICv2

    Processor Interface registers. The notes under the Table 3-2 specify

    that this is referring to GICv3 peripheral. I am assuming you intend to

    use the GICv2 in your use case? The correct memory map (from the same

    table) for that would be the following:

    0x00_2C00_1000 0x00_2C00_1FFF GIC Distributor GIC Distributora 4KB -

    0x00_2C00_2000 0x00_2C00_2FFF GIC Processor Interface GIC Processor

    Interfacea 4KB -

    0x00_2C00_4000 0x00_2C00_4FFF GIC Processor Hyp Interface GIC Processor

    Hyp Interfacea 4KB -

    0x00_2C00_5000 0x00_2C00_5FFF GIC Hyp Interface GIC Hyp Interfacea 4KB -

    0x00_2C00_6000 0x00_2C00_7FFF GIC Virtual CPU Interface GIC Virtual CPU

    Interfacea 8KB -

    I hope this clarifies your confusion.

Reply
  • 0 Arm Employee Badge

    > I'm looking at the ARMv8 Foundation Model User Guide (ARM DUI 0677C).

    > In section 3.1, Memory Map, the following data appears regarding the 

    > address of GICv2 registers:

    >

    > 0x00_2C00_0000 0x00_2C00_1FFF, GIC Physical CPU interface, GICC, 8KB

    > 0x00_2C00_1000 0x00_2C00_1FFF, GIC Distributor, GICD, 4KB

    I think there is a slight confusion here about what the User Guide is

    referring to. Basically, the ARMv8 Foundation model can use both GICv2

    and GICv3. By default, it will use the GICv2 memory map unless "--gicv3"

    option is specified.

    > 0x00_2C00_0000 0x00_2C00_1FFF, GIC Physical CPU interface, GICC(b),

    8KB

    This is for the GICv3 CPU Interface registers and not the GICv2

    Processor Interface registers. The notes under the Table 3-2 specify

    that this is referring to GICv3 peripheral. I am assuming you intend to

    use the GICv2 in your use case? The correct memory map (from the same

    table) for that would be the following:

    0x00_2C00_1000 0x00_2C00_1FFF GIC Distributor GIC Distributora 4KB -

    0x00_2C00_2000 0x00_2C00_2FFF GIC Processor Interface GIC Processor

    Interfacea 4KB -

    0x00_2C00_4000 0x00_2C00_4FFF GIC Processor Hyp Interface GIC Processor

    Hyp Interfacea 4KB -

    0x00_2C00_5000 0x00_2C00_5FFF GIC Hyp Interface GIC Hyp Interfacea 4KB -

    0x00_2C00_6000 0x00_2C00_7FFF GIC Virtual CPU Interface GIC Virtual CPU

    Interfacea 8KB -

    I hope this clarifies your confusion.

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