We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.
Hi,
I'm looking at the ARMv8 Foundation Model User Guide (ARM DUI 0677C). In section 3.1, Memory Map, the following data appears regarding the address of GICv2 registers:
0x00_2C00_0000 0x00_2C00_1FFF, GIC Physical CPU interface, GICC, 8KB
0x00_2C00_1000 0x00_2C00_1FFF, GIC Distributor, GICD, 4KB
This makes it look like the GICC registers overlap the GICD registers. Since the GICC really only extends to 0x1003, I guess the GICC registers would overlap by only four bytes.
It appears that by reading the GICD_IIDR register that the GICD really is at 0x2C00_1000, but I haven't gone further to characterize the behavior of the register at 0x2C00_1000, which is either the GICC_DIR or the GICC_CTLR.
So my question: Is the documentation wrong? Is the model wrong?
Thanks,
Bill
no problem. I'm pleased that its sorted.