Get missing source data $Cache Data Refill / $Cache DataAccess in streamline

thought a pic would be useful

thanks

You get that error if you did not capture those counters in the trace you are using.

You'll need to add the cache counters to the capture list in the counter configuration window before you start capturing data (there are limits on how many counters you can capture in parallel, so you may need to remove a few to make space).

> i really need to get the number of hits and missed to the cache in order to now the bandwidth

Note you'll probably want to use the L2 cache counters, rather than the L1 data cache counters if you want system memory bandwidth. L1 to L2 traffic is normally much higher, but not visible outside of the CPU.

HTH,
Pete

Thanks that was very helping i will try it.

Hello Peter,

I was looking for a solution to an issue I am facing and found this post. In your response- "Note you'll probably want to use the L2 cache counters, rather than the L1 data cache counters if you want system memory bandwidth". Can you please elaborate on using L2 cache counters v/s L1 counters. I notice that the L1 Data Refills are not same as L2 Data requests, in fact they are twice that number. I am unable to understand why. I am using a Exynos4 Quad 4412 that has PL 310 L2 Controller. My application mostly does Loads from L2 Cache. So, most of the Loads miss L1 Data cache. Could the increase in L2 Data requests be due to other non-core modules accessing L2 cache?

Thanks,

DK