This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

mmu page table

Note: This was originally posted on 22nd April 2013 at http://forums.arm.com

hi
some question about MMU table.

background:
1.the CPU is ARM1176JS-Z.
2. L1 cache enabled
3.i want to enable MMU in bootloader, to simply it, i only introduce first-level page table.
4. the page table will not be changed after initialization

my question is that:
for the page table itself, where should i put it into? a cacheable area? or a noncacheable area? does MMU hardware access the page table through L1 cache?
both area(cacheable and noncacheable) i have tried, it looks both of them work.
i saw some other code put the page table into noncacheable area , so i want to know if it is must or not.

thanks in advances

BR
PanWei
0