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Cortex series scheme NEON has rename SIMD register?

Lee Jesse
Note: This was originally posted on 18th April 2013 at http://forums.arm.com

NEON contains 16 SIMD user visible registers q0~q15, while does it have more architecturally visible register? Just like general 32 bit register engaged.
Anybody know which document or spec demonstrate related topic?
Thanks to any interesting discussion!
Parents
  • Note: This was originally posted on 19th April 2013 at http://forums.arm.com

    CPU designs from Qualcomm and Apple are completely independent of CPU designs from ARM like Cortex-A15. They're designed to meet the architecture spec (ARMv7a) but this has no constraints in implementation details like instruction reordering. Just that the instruction semantics have to be correct.

    Neither company says very much about their CPUs, I don't think Apple has even publicly mentioned they made one at all.

    Look at page 24 of the PDF I linked, it talks about register renaming there.
Reply
  • Note: This was originally posted on 19th April 2013 at http://forums.arm.com

    CPU designs from Qualcomm and Apple are completely independent of CPU designs from ARM like Cortex-A15. They're designed to meet the architecture spec (ARMv7a) but this has no constraints in implementation details like instruction reordering. Just that the instruction semantics have to be correct.

    Neither company says very much about their CPUs, I don't think Apple has even publicly mentioned they made one at all.

    Look at page 24 of the PDF I linked, it talks about register renaming there.
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