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Fast duplicate lane

Note: This was originally posted on 17th April 2013 at http://forums.arm.com

hi.
I have a little problem.

I have as input a Dn register with 8 byte.
[a, b, c, d, e, f, g, h]

I'd like to have 2 Dn Register with
[a, a, b, b, c, c, d, d]
and
[e, e, f, f, g, g, h, h]

The purpose is to try to do that with a minimum number of NEON register.
for the moment the best Way I found is something like


vmovl.u8              Qn, Dn                 @ convert byte to half word
vmul.u16              Qn, Qn, Qx    @ Dx contain 8 * 257

I'm looking for a solution not using extra register !

do you nhave any idea ?
thank's

Etienne SOBOLE over 12 years ago

Note: This was originally posted on 18th April 2013 at http://forums.arm.com

You might get away without the multiply and have a transient register (rather than one containing the constant) by shifting the widened value left and ANDing it with the unshifted version, which might be faster (untested theory) but it is technically one instruction longer, so depends on pipeline (shift and and should be "simple" operations vs a MUL but YMMV).

You mean

vmovl.u8 q1, Dn vshll.u8 q2, Dn, #8 vand.u16 q1, q1, q2

Yes that could be better because I can use a temporary register instead af a fixed one !

I'll try !
thank's
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Etienne SOBOLE over 12 years ago

Note: This was originally posted on 22nd April 2013 at http://forums.arm.com

Ok thank's to everybody.

I'll try new proposed solution, but it seem's that vzip would be the best solution.
That was very interesting to se so many differente solution to solve this simple problem !

@RKSimon : thank's for VSLI, I had never try this instruction
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Simon Pilgrim over 12 years ago

Note: This was originally posted on 19th April 2013 at http://forums.arm.com

Wouldn't shift insert do this?

vmovl.u8 q1, Dn vsli.u16 q1, q1, #8

Simon.
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Gilead Kutnick over 12 years ago

Note: This was originally posted on 22nd April 2013 at http://forums.arm.com

Also, this is kind of weird, but you can replace

vmov d1, d0

with something like

vext.8 d1, d0, d0, #0

if that gives you better scheduling/pairing.
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Gilead Kutnick over 12 years ago

Note: This was originally posted on 19th April 2013 at http://forums.arm.com

What about this?

// d0 = [ a b c d e f g h ] vmov d1, d0 vzip.8 d0, d1
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Peter Harris over 12 years ago

Note: This was originally posted on 17th April 2013 at http://forums.arm.com

I'm looking for a solution not using extra register !

I think you're out of luck - whatever you do is going to need a scratch register because you either need to hold the temporary modified value of the data before you combine it, or a constant for the multiply trick.

You might get away without the multiply and have a transient register (rather than one containing the constant) by shifting the widened value left and ANDing it with the unshifted version, which might be faster (untested theory) but it is technically one instruction longer, so depends on pipeline (shift and and should be "simple" operations vs a MUL but YMMV).

FWIW the multiply trick you are doing already is what I've used in the past for cross-lane data duplication, so that's my answer

Iso
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Peter Harris over 12 years ago

Note: This was originally posted on 19th April 2013 at http://forums.arm.com

Yes, looks good to me.
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