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ARM7TDMI processor mode

shan S
Note: This was originally posted on 23rd November 2012 at http://forums.arm.com

I am using the ATMEL91SAM7SE512 controller with ARM7TDMI processor.The application is running in the User mode .

when the interrupt(IRQ) occurs processor must switch to IRQ mode,then it should go to the IRQ handler routine.

here application developer part is to tell the IRQ handler address only.so who taking the responsibility to change from User mode to IRQ mode.

whether the core itself switched into IRQ mode using hardware setup or some low level routines(program) avail.i struck in this point , i cant

proceed further on this study of ARM7TDMI processor.


please tell me your thoughts regarding this query.

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thanks
shan.s



  • Note: This was originally posted on 26th November 2012 at http://forums.arm.com


    Assuming that interrupts are enabled (CPSR.I=0) the processor will automatically switch to IRQ mode when the IRQ is signaled.  It will also automatically start executing from the IRQ entry in the vector table.

    It is up to the boot code to make sure the vector table is in place, with the correct handlers set up.




    Hi,
          Thanks for ur answer. it is fine that in boot program we are filling the exception vectors.
    may i know about exception entry and exception exit code.they given the exception entry and
    exception exit code (ASSEMBLY) in ARM7TDMI processor architecture document.it is not in
    my project code( Boot program(startup.s) + application program).simply we cant assume  that mode
    switch were happened and interrupt handler routine is called.


    thanks
    shan.s
  • Note: This was originally posted on 26th November 2012 at http://forums.arm.com


    I'd highly recommend the ARM System Developer's Guide book if you are interested in any of this low level platform setup; I always a copy open on my desk!



    Hi,
         I am really confused in the below mentioned thing.

    Let take
    Current Mode     = User mode;
    Exception occur = IRQ;

    Exception entry:
                when the IRQ occurs , have to copy the CPSR of user mode(current) to SPSR_irq.
    load the PC with irq exception vector address and load the return address of the User
    program into LR_irq.then we have to change the mode in the CPSR.

    Exception leaving:
               On leaving , have to copy the PC with the LR_irq and change the mode the CPSR to User mode.


    doubts in Exception entry:
    =====================

    1. Here they are accessing the SPSR_irq before moving the processor to the IRQ mode.
    How this is possible.because in user mode it is not possible  access the SPSR registers of
    other exception modes.
    2. i think the address value of  CPSR = 16.what is the address value of SPSR(irq,fiq,svr.....).

               can i get the any PDF of  ARM System Developer's Guide book .author name pls.


    thanks
    shan.s







  • Note: This was originally posted on 27th November 2012 at http://forums.arm.com


    I think what you missing is that these steps (CPSR -> SPSR_irq, updating the CPSR and branching to the vectors) are ALL AUTOMATIC.  That is the hardware does it for you when it recognizes the IRQ exception. 

    So you are correct - the User mode software would not be able to perform these steps.  But that does not matter, as it is the hardware that is taking care of it.



    Thank you so much....

    doubts:
    ========

    1. mode switching for all the exceptions are automatic by the Hardware... am i correct?

    2. ARM7TDMI processor only i know (little bit).i want  learn RTOS. is it possible to
        learn using FreeRTOS in this processor? or we have to chose some higher
        level processor ARM.

    3. i have gone through some API in FreeRTOS.tell some the development kit using this processor to learn RTOS.
  • Arm Employee Badge
    Note: This was originally posted on 26th November 2012 at http://forums.arm.com

    Assuming that interrupts are enabled (CPSR.I=0) the processor will automatically switch to IRQ mode when the IRQ is signaled.  It will also automatically start executing from the IRQ entry in the vector table.

    It is up to the boot code to make sure the vector table is in place, with the correct handlers set up.
  • Arm Employee Badge
    Note: This was originally posted on 26th November 2012 at http://forums.arm.com

    I think what you missing is that these steps (CPSR -> SPSR_irq, updating the CPSR and branching to the vectors) are ALL AUTOMATIC.  That is the hardware does it for you when it recognizes the IRQ exception. 

    So you are correct - the User mode software would not be able to perform these steps.  But that does not matter, as it is the hardware that is taking care of it.
  • Arm Employee Badge
    Note: This was originally posted on 26th November 2012 at http://forums.arm.com

    I'd highly recommend the ARM System Developer's Guide book if you are interested in any of this low level platform setup; I always a copy open on my desk!