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Question about Program counter

Camp Phor
Note: This was originally posted on 1st October 2012 at http://forums.arm.com

[size=2]Hey[/size]

[size=2]Can someone please explain why instructions that modify the value of the PC (such as branches or [/size][size=2]mov pc, lr[/size][size=2]) requireadditional clock cycles to execute than those who don't operate on the PC. [/size]

[size=2]does branch link modify the value of PC or LR?[/size]

[size=2]
[/size]

[size=2]thanks [/size]

  • Note: This was originally posted on 2nd October 2012 at http://forums.arm.com

    [size=2]awesome, thanks heaps.[/size]
    [size=2] [/size]
    [size=2]I've actually got heaps of questions i would like to ask...haha[/size]

    [size=2][size=2][size=2]What does the [/size][size=2]rsb [/size][size=2]instruction do?  we'll i know what it does but don't fully understand why we would use rsb rather than sub...?[/size][/size][/size]
    [size=2][size=2][size=2] [/size][/size][/size]
    [size=2][size=2][size=2]could someone give an example of an expression that would require the use of rsb rather than sub?[/size][/size][/size]
    [size=2][size=2][size=2] [/size][/size][/size]
    [size=2][size=2][size=2]thanks heaps~[/size][/size][/size]
  • Note: This was originally posted on 1st October 2012 at http://forums.arm.com

    While branching, the program execution jumps to the sub-routine address and starts the execution from there. Hence, during branching the processor stores (PUSHes) the PC contents onto stack, i.e. it stores the address of the next instruction where it left the main code. This address is required during return form sub-routine so that the program execution continues from where it had branched.
    The program execution returns back to main program when it executes a RETurn instruction in the sub-routine program. When RETurn instruction is executed, the PC contents stored on the stack are POPed back onto PC and program execution begins. (This is the address of the main program from where the program execution had branched to sub-routine)


    Extra clock Cycles are required to PUSH the PC contents onto stack.
  • Arm Employee Badge
    Note: This was originally posted on 1st October 2012 at http://forums.arm.com


    ...why instructions that modify the value of the PC (such as branches or mov pc, lr) require additional clock cycles to execute than those who don't operate on the PC.

    Fetching instructions from memory takes time; this is normally hidden by pipelining the fetch underneath normal instruction execution, but [on simpler processors at least] relies on assuming that the program counter will only increment sequentially. If a branch (or other PC modifying instruction) is executed, then this assumption will be incorrect, and the processor will have to go and restart fetching instructions from memory at the new PC address - thus causing these instructions to take more time than other data processing.


    does branch link modify the value of PC or LR?

    Branch with link updates both the LR to point to the instruction after the BL instruction, and the PC to the target of the BL.

    hth
    s.
  • Arm Employee Badge
    Note: This was originally posted on 3rd October 2012 at http://forums.arm.com

    For ARM ISA you can also put operand 2 though the shifter "for free" as part of the instruction, so if you want to do x = 2y - z you can do rsb x, z, y,#LSL1

    EDIT: Correct shift - too late for this ;)