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Memory alignment while using LDR instruction in cortex A9

Note: This was originally posted on 3rd August 2012 at http://forums.arm.com

Hi,

I am facing some problem while trying to load a 32 bit value into a register by using LDR R0 [R1] where R1 is a pointer to a memory location having some value.
when i use the LDR instruction 3bytes are fetched from the location pointed by R1 and the 4th byte is 1byte before the loacation pointed by R1.
I am working on ARM Cortex A9 simulator.
Is it anything related to memory alignment?
How do i solve this?

Thanks in advance
Angel
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  • Note: This was originally posted on 6th August 2012 at http://forums.arm.com

    HI ttfn,

    The value of R1(pointer) is 0x403023cd.
    Im using CCS V5, In the properties i have chosen cortex R4.

    The memory looks like

    address     0x403023cc   0x403023cd             0x403023ce               0x403023cf                 0x403023d0               

    value                  0x4E                   0X4D                      0X4C                         0X4B                          0X48    

    R1 is pointing to 0x403023cd
    when I try loading LDR R0,[R1], the value i get in R1 IS 4E4B4C4D.
    How do i solve this?
Reply
  • Note: This was originally posted on 6th August 2012 at http://forums.arm.com

    HI ttfn,

    The value of R1(pointer) is 0x403023cd.
    Im using CCS V5, In the properties i have chosen cortex R4.

    The memory looks like

    address     0x403023cc   0x403023cd             0x403023ce               0x403023cf                 0x403023d0               

    value                  0x4E                   0X4D                      0X4C                         0X4B                          0X48    

    R1 is pointing to 0x403023cd
    when I try loading LDR R0,[R1], the value i get in R1 IS 4E4B4C4D.
    How do i solve this?
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