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AMBA AHB

Note: This was originally posted on 10th July 2012 at http://forums.arm.com

Hi,
  I have been working on AMBA AHB slave design. I have come across a deadend.
The problem is as follow.

When a master inserts a busy transaction indicated by the HTRANS as 01. What should be the condition of HREADY from the slave.
The spec says that the slave should provide a non zero wait state to the busy inserted byt the master.
However what should be the status of HREADY when the slave itself is busy and is not able to complete the previous transaction.
Kindly help me with this if possible.
Regards,
sandesh shetty
  • Note: This was originally posted on 17th July 2012 at http://forums.arm.com

    Hi,
      I have been working on AMBA AHB slave design. I have come across a deadend.
    The problem is as follow.

    When a master inserts a busy transaction indicated by the HTRANS as 01. What should be the condition of HREADY from the slave.
    The spec says that the slave should provide a non zero wait state to the busy inserted byt the master.
    However what should be the status of HREADY when the slave itself is busy and is not able to complete the previous transaction.
    Kindly help me with this if possible.
    Regards,
    sandesh shetty


    Hi, I think the description in AHB is clear about the operation. (ARM IHI 0011A, section 3.5, page 3-9)
    "The BUSY transfer type allows bus masters to insert IDLE cycles in the middle of bursts
    of transfers. This transfer type indicates that the bus master is continuing with a burst of
    transfers, but the next transfer cannot take place immediately. When a master uses the
    BUSY transfer type the address and control signals must reflect the next transfer in the
    burst.
    The transfer should be ignored by the slave. Slaves must always provide a zero wait state
    OKAY response, in the same way that they respond to IDLE transfers."

    By the way, it is a zero-wait OKAY response, not " a non zero wait state"
  • Note: This was originally posted on 12th July 2012 at http://forums.arm.com

    Sandesh,

    If a slave is being asked to do something (a nonseq or seq) access, it can add wait states using HREADY during the data phase for those transfers,

    But if the slave is not being asked to do anything (so busy or idle transfers), there is no reason for the slave to need to add wait states, so the HREADY signal must be driven high for the data phases of those transfers.

    When you say "the slave itself is busy", what is it busy with such that it can't just check HTRANS to see if it just needs to return a default HREADY=1 response for the idle/busy transfer request, or hold HREADY=0 for the nonseq/seq transfer request ?

    JD