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How to get Cycle Count in FVP Corstone SSE-300 Ethos-U55?

HI, It seems that FVP Corstone SSE-300 Ethos-U55 does no longer has the parameter "Cpu0.has_pmu" which is used to get cycle count (I Used --list-params to see all available parameter and this parameter is not there). Is there any other parameter that can be used to get cycle count? or is there another way to get cycle count? Need Help.

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0 ARMcubic 9 months ago in reply to Archith

// Enable DWT cycle counter
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
DWT->CYCCNT = 0;
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
cyccnt = DWT->CYCCNT;
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0 ARMcubic 9 months ago in reply to Archith

// Enable DWT cycle counter
CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
DWT->CYCCNT = 0;
DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
cyccnt = DWT->CYCCNT;
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0 Archith 9 months ago in reply to ARMcubic

I added this to my code but still its value is Zero.

uint32_t start_cycles, end_cycles;

// Enable DWT cycle counter

CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;

DWT->CYCCNT = 0;

DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;

start_cycles = DWT->CYCCNT;

printf("start_cycles = %lu\n", start_cycles);

int num_iterations = 50000000;

int value=0;

for (int i = 0; i < num_iterations; i++) {

value = i*i;

}

end_cycles = DWT->CYCCNT;

printf("end_cycles = %lu\n", end_cycles);

Is there anything else to consider?
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