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Is SVC pendable on cortex-m?

Hey.

I read ARMv7-M Arch manual.

SHCSR register have SVCALLPENDED bit.

So that, It seem SVC is pendable.

But, 'Priority escalation' is written,

When the group priority of a pending synchronous fault or supervisor call is lower than or equal to the
currently executing priority, inhibiting normal preemption. This applies to all synchronous exceptions, both
faults and SVCalls.

This seem SVC is not pendable.

Is SVC pendable? If true, how behaver?

Parents
  • 1. Yes. Just like normal tail-chained interrupt, the stack frame for the higher priority IRQ is the same one as the SVC exception, so the return address is the same.

    2. When the processor exit from the higher priority interrupt, the pending status of all pended exceptions are checked (by processor's hardware) and tail chain into an exception if there is an exception (with sufficient priority level) to be serviced.

    regards,

    Joseph

Reply
  • 1. Yes. Just like normal tail-chained interrupt, the stack frame for the higher priority IRQ is the same one as the SVC exception, so the return address is the same.

    2. When the processor exit from the higher priority interrupt, the pending status of all pended exceptions are checked (by processor's hardware) and tail chain into an exception if there is an exception (with sufficient priority level) to be serviced.

    regards,

    Joseph

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