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Why linux set memory as inner shareable in multi-cluster ARMv8 cores?

Hi, 

I have board with two clusters, one has 4*A57 cores, and the other has 4*A53 cores.

The A57 cluster has its own L1 and L2 cache, A53 cluster also has its own L1 and L2 cache. Between the clusters there is a CCI.

There is no L3 cache. So the memory will be the L3.

My question is,  in this situation why linux set memory as inner shareable? (Also I can not find any outer shareable definition in all of the linux codes.)

In my opinion, when you want to make data coherency between clusters, you must set it as outer shareable.

Am I right? Hope to get your help.

BR

Thomas

Parents
  • You are not fully right. 

    Cache could be inner and outer. Inner caches are typically L1 and L2 with outer being L3. Both of the caches could be in inner shareable memory. Or which is a SOC design decision L3 could be in outer shareable domain with L1 through L2 in inner shareable domain. In general ARM recommends and the HW/SoC design should follow that all the caches managed by a single operation system should be in the inner shareable domain.

    Please find a detailed discussion here:

    community.arm.com/.../30786

Reply
  • You are not fully right. 

    Cache could be inner and outer. Inner caches are typically L1 and L2 with outer being L3. Both of the caches could be in inner shareable memory. Or which is a SOC design decision L3 could be in outer shareable domain with L1 through L2 in inner shareable domain. In general ARM recommends and the HW/SoC design should follow that all the caches managed by a single operation system should be in the inner shareable domain.

    Please find a detailed discussion here:

    community.arm.com/.../30786

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