I was getting a NOCP Usage Fault when my non-secure thread entered WIC sleep and a Secure Handler woke up the processor from WIC sleep.
I wasn't using any FPU code and I could not understand why the M33 was throwing a NOCP Usage Fault.
Luckily, I had access to IP and could see that I needed to set the NSACR and or clear the FPCCR ASPEN bit.
I bet there are other ways to do this unbeknownst to me, too.
I don't really understand the tradeoffs and could find no mention of when and why to set the various bits in the FPCCR in the UG or TRM.
So is there a good FPU programming reference anywhere that goes in depth on these scenarios?
Preferably one that talks about do's and don'ts with respect to Secure and Non Secure use.
I'll even take an M4 version if it exists.
Anyone have any insight on the correct way to use the FPU when sharing or not sharing between the Secure and Non-Secure states?
Yes, I've forwarded my request to the support team.
What about the FPU for the M4? Is there a guide for that?
not to my knowledge. There are many libraries out there but I do not recall seeing any thing specific to the FPU. Have you checked out the book from Joseph?
Support team pointed me to an APP Note for v7M FPU stacking and context switching.
* App Note 298: Cortex-M4(F) Lazy Stacking and Context Switching
https://developer.arm.com/docs/dai0298/latest/cortex-m4f-lazy-stacking-and-context-switching-application-note-298