Hello to all,
In order to measure the current variation due to instruction address location. I filled the memory with NOP instructions and tried to observe the variation in the current consumption due to change in the instruction address, although the instruction is throughout same.
And as a result, I have got the current consumption, but from the captured current consumption for multiple times, I think there is some periodic behaviour is occurring, but couldn't find the instruction address on which it's beginning and on which it ends. Since the frequency of measurement is 12MHz and target processor is ARM Cortex-M4. Is there any way to find out the least current consumption on which instruction address???
Thanking you,
Regards,
Himanshu
This is just theory; I do not know if it will work.
I think you can make very accurate measurements if you use an external oscillator, which you can control by another microcontroller running at higher speeds.
As Joseph Yiu already mentioned, you can change the state of a GPIO-pin.
This can be done to synchronize, so you know that you're at address 0x200 for instance.
Since each NOP will always take one clock cycle, then you can use the external microcontroller to count the clock cycles.
So in this example, you have a pin-toggle at address 0x200, then you set your counter to 0x200 and increment it each time the oscillator's pin go high.
-So if you can find a microcontroller, that can handle such high frequencies, then that might be the most accurate way.
(perhaps by using a timer input capture pin on a STM32H7, you could set the counter register to the starting address and let the timer count on each rising edge of the oscillator pin; the STM32H7 might be able to measure the temperature using external sensors, but it seems you have equipment for this already).
You might also be able to peek inside the MCU by using SWD, but I would expect that to be more inaccurate and also use some extra power, so it would affect the results.
Regarding using external oscillator:
Assumed that you know exactly when the processor come out of reset, able to track the instruction execution timing, it might be possible to tell the PC (program counter). However, the reset circuit in microcontrollers are often fairly complicated, and the wait state of the memory system is hard to tell - many microcontrollers have embedded flash that are optimized for lower power, but relatively slow in term of access time. So many microcontroller vendors added some forms of flash cache or flash pre-fetch circuit, and it often make it impossible to tell if the processor pipeline is stalled while waiting for the flash. For small loops, it is likely that there is no cache miss and the access could be done immediately. But for running larger benchmarks there are often cache misses.
Using SWD or trace doesn't provide accurate timing as by the time the PC samples are received the actual PC possible already advanced several hundreds of time.