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Cortex M3 : what determines the cycle count for a variable cycle count instruction?

Iain Rist

I have looked at the cycle counts for the Cortex M3 instructions at http://infocenter.arm.com/help/topic/com.arm.doc.100165_0201_00_en/ric1414056333562.html. Some instructions are listed as taking a range of cycles to complete. I want to understand what conditions determine the actual cycle counts.

I am particularly interested in the SMULL/UMULL, SMLAL/UMLAL instructions which take between 3-5 and 4-7 cycles respectively. The linked reference stipulates the instructions terminate early depending on the size of source values. What does this mean exactly?

I am also interested in the SDIV and UDIV instructions which take 2-12 cycles. Is there a way I can determine how many cycles the instruction will actually take?

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    I am guessing here:
    For (S|U)DIV: The time it takes depends on the input values. I guess to get a rule of thumb(TM) you have to know the design. What I am pretty sure is, that for the same inputs you get the same number of cycles.
    As for multiplication, I'd say there are lesser steps if the input values have lot of leading zeroes.

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    I am guessing here:
    For (S|U)DIV: The time it takes depends on the input values. I guess to get a rule of thumb(TM) you have to know the design. What I am pretty sure is, that for the same inputs you get the same number of cycles.
    As for multiplication, I'd say there are lesser steps if the input values have lot of leading zeroes.

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