Hello,
I was wondering what the memory map of an SOC that includes a ARMv8-M TrustZone enabled system would like. Is it fixed or is it variable ? Based on the ARMv8-M ARM, it appears that things like the SAU, MPU, NVIC etc are all memory mapped and are expected to be at fixed address. Does this mean there is one SAU and one MPU for an entire SOC even if it includes multiple ARMv8-M cores?
section b7.1 of the ARMv8-M ARM has a system address map which defines addresses and the memory properties. If this address map is fixed, why do we need an MPU which has configurable regions with different memory attributes ?
Thanks
You're welcome. In addition to what Pete said with regard to 4), a slightly more convoluted but possibly cheaper solution would be to connect the same interrupt source to both processors' NVICs. The software would then need to determine which processor handles that interrupt. For example, the corresponding interrupt handlers (for both processors) could use a mutex to ensure that both processors don't end up trying to work with the same peripheral at the same time.