Support forums

Architectures and Processors forum The mutex implementation for TCM when using both cores-ARM9 that shares TCM

State Accepted Answer
+1 person also asked this people also asked this
Locked Locked
Replies 2 replies
Subscribers 347 subscribers
Views 3871 views
Users 0 members are here

Options

How was your experience today?

This discussion has been locked.

You can no longer post new replies to this discussion. If you have a question you can start a new discussion

The mutex implementation for TCM when using both cores-ARM9 that shares TCM

dortain over 7 years ago

Hi experts of ARM,

I have a question about mutex implemention using SWP insruction based on ARM9 both core that share TCM. Can it support SWP atomic Operation that TCM can't have bus arbitration? And busy/free signal is OK?

Thanks!

+1 Martin Weidmann over 7 years ago

TCMs are expected to be private. Which is why the TCM interface doesn't have an equivalent to the AHB lock signal.

If you need to put the lock in TCM, you could use one of the algorithms that don't require a SWP (or exclusive) instruction. For example, ticket locks:
en.wikipedia.org/.../Ticket_lock
Cancel
Up 0 Down

Cancel
0 dortain over 7 years ago in reply to Martin Weidmann

Thanks!
Cancel
Up 0 Down

Cancel