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4 Bytes repeating when using memcpy

Hi ,

We are using Cortex-M4(STM32F429IIH6) processor for our IOT project. We are seeing a data corruption when memcpy used, the corruption pattern was identified by feeding a Fixed pattern of size 512 Bytes from Src to Dest using memcpy, and it is not happening in all the iterations.

If you see the image attached below that Data "6 N 7 O" is replaced with 2 Bytes("Highlighted with orange color" 4L).  

Can any one tells that what can be the reason for this wired behavior? We are in a critical phase of our project.

 

Regards,

Krishna Prasad

  • If this happens only occasionally, potentially one of your interrupt service routines might have caused a register corruption. Try using event trace to see which IRQ/exception is triggered in the failing case.
    Please also double check your stack setup to ensure double word stack alignment at function boundaries.
  • Hi Joseph Yiu,
    Thank you for the valuable suggestion.
    1) We kept the process memcpy inside Critical section.
    The block of code is added below.
    /******************Critical section Handling********************/
    #define F076_ENTER_CRITICAL_P(a) do{ \
    (*a)=__get_PRIMASK();\
    __disable_irq();\
    __DSB();\
    __ISB(); }while(0)

    #define F076_EXIT_CRITICAL_P(a) __set_PRIMASK(*a)
    /*****************Critical section Handling*********************/

    Function fctnTestCase(){
    intr_status_t criticalEntryIrqStat;
    F076_ENTER_CRITICAL_P(&criticalEntryIrqStat);
    memcpy(g_BufferForParsing.buffer, pMsgFromHost->msgBegin, pMsgFromHost->msgSize);
    g_BufferForParsing.size = pMsgFromHost->msgSize;
    F076_EXIT_CRITICAL_P(&criticalEntryIrqStat);

    }

    So the Pre-emption will be restricted here, but issue still observed.

    2) Ensured double word stack alignment at function boundaries.
    In icf file saw that alignment is 8 Bytes, and checked under Registers\System Control Block\CCR\STACKALIGN also set to 1.
    define symbol __ICFEDIT_size_cstack__ = 0x4000;
    ...
    define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
    ...

    Regards,
    Krishna
  • Just by visual inspection I don't see anything stands out.
    Other areas to check:
    - any chance of stack overflow?
    - any possibility that pMsgFromHost got changed by other hardware while memcpy is on going?
  • 1. check address alignment
    printf("%p\n", g_BufferForParsing.buffer);
    printf("%p\n", pMsgFromHost->msgBegin);

    2. try to replace memcpy with the following code to see any difference.

    volatile unsigned int * dst = (volatile unsigned int*) g_BufferForParsing.buffer;
    volatile unsigned int * src = (volatile unsigned int*) pMsgFromHost->msgBegin;
    int sz = pMsgFromHost->msgSize / 4;
    for (int i = 0; i < sz; i++) {
    dst[i] = src[i];
    }
  • Thank you for all the valuable suggestions and  comments,

    We have resolved this issue by Setting RBURST bit in the SDCR Register of SDRAM as per the errata,

                                   Screenshot- 1

    But after the fix we saw that the above fix will can introduce SDRAM bank address corruption 

                                      Screenshot- 2

    Can any one suggest the steps to do the Second or third work around mentioned in the Screenshot- 2 without affecting the Previous fix.

    www.st.com/.../en.DM00068628.pdf

    Regards,

    Krishna Prasad

  • Since this is specific to ST device, maybe you should post this question on STM32 forum as well.

    https://community.st.com/community/stm32-community/stm32-forum/content