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Trustzone Address Space controller fault to secure monitor.

Vincent Siles

Hi,

I'm using a TZC380 (on an i.MX6 board from NXP) along with NXP CSU to protect some part of my DDR ram and some sensitive devices.

For the TZC configuration, I choose an action set to 3: "sets tzasc_int HIGH and issues a DECERR response".

My secure monitor is configured to route Non Secure External Abort to the secure monitor (SCR = 0xd)

I triggered an illegal access from Linux by trying to read a secure address, and I directly jump to the "Data Abort" entry of my secure monitor VBAR.

At this time, if I print the NS DFSR and DFAR, their content doesn't seem relevant to my error, and especially DFSR doesn't have the Ext bit set.

If I print the S DFSR, I get 0x18 -> Synchronous External Abort.

 

I would expect to jump to the NS VBAR Data Abort entry instead of the MBVAR, and in the latter case, I would expect the External Abort bit to be set in the DFSR

 

Is my understanding wrong ? Can someone clarify a bit the situation of what is happening in such a configuration ?

 

Best,

Vincent

Parents
  • +1 Arm Employee Badge in reply to Vincent Siles
    Yep. The DFSR/DFAR will get updated based on where you take the exception, not where the exception was caused.

    Most ext aborts are imprecise so there is often not a lot of useful information in the DFxRs anyway. Bus level security gates usually provide some registers that can be interrogated to provide additional info. TZC has Fail Status/Address registers.
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  • +1 Arm Employee Badge in reply to Vincent Siles
    Yep. The DFSR/DFAR will get updated based on where you take the exception, not where the exception was caused.

    Most ext aborts are imprecise so there is often not a lot of useful information in the DFxRs anyway. Bus level security gates usually provide some registers that can be interrogated to provide additional info. TZC has Fail Status/Address registers.
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