We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.
Question: When a processor is interrupted when it is executing a Jump instruction, what goes on the stack - the address of the instruction next to jump or the address where the jump is supposed to go."
The old address after an interrupt is always such that a return from the interrupt will resume execution correctly. Therefore the address should be either the start of the jump and the jump is redone or the place it is going to. However in 32 bit ARM and Thumb the old address is at an offset beyond that point dependent on the interrupt type, and the offset has to be subtracted before returning - except for SVC where you want to return to just after the SVC anyway. If you see an address after the jump it is because the jump wasn't executed and the return sequence will subtract an instruction size to do the jump. I believe this business about the offset is a relic of the earliest ARM chips where they saved a bit of circuitry by using the PC where the instruction decoder had currently got to rather than a more logical value. Thankfully it all goes away in the 64 bit ARMs.
Further to that reply, note that in general instructions are atomic (there are a very few exceptions and branches are not one of them!) and are not interrupted when an exception occurs. So either the branch won't have started (in which case the exception handler will return to execute the branch) or it will have completed (in which case the next instruction will be the branch destination).
I think it's also worth pointing out that branch instructions in the ARM architecture do not place anything on the stack. The return address is placed in the link register (LR, R14). Similarly, the processor doesn't automatically place anything on the stack when handling an exception. It uses LR and SPSR to store the return address and the processor state (of course, the handler may put these on the stack).
(Unless you're using an ARMv7-M microcontroller core, in which case all of the APCS corruptible registers are automatically stacked on exception entry).
Hope this helps.
Chris