Dear all,
It seems there are some GIC-400 implementations on ARMv8 platforms where the register address layout is somewhat deviating from the GIC-400 TRM.
I found some code in the Linux kernel driver (irqchip/irq-gic.c) that moves the base address of the GIC CPU interface up by 60kB so that the GICC_DIR
register can still be found at offset 0x1000. Otherwise, the register would be at offset 0x1_0000 which is not mentioned anywhere in the documentation.
Can someone tell me based on which clause in the architecture reference manual this can be done? Is there any method to detect this address layout other
than by reading the GICC_IIDR from the original and the aliased location and comparing them, as it's been done here:
Linux/drivers/irqchip/irq-gic.c - Linux Cross Reference - Free Electrons
Best regards,
Matthias
Sounds like it might be implementing GICv2m. GICv2m is an extension to the base v2 architecture to support MSIs. It's described in an appendix of the Server Base System Architecture (SBSA).
Server Base System Architecture
Thank you. Appendix F has the necessary information.