Process ADC data, moved by DMA, using CMSIS DSP: what's the right way?

An AND operation will cost 1 clock cycle at least.

I will expect that it will stay at one clock cycle because the compiler should prepare the AND-mask before the loop starts.

The ADC, however, should always give you the same bit-values in the upper bits.

As far as I recall, the LPC4xxx can be configured to shift the bits to the top, which means you should be able to min/max those as most-significant instead of least-significant.

Thus you would not need to do any shifting or ANDing.

If the LPC4xxx always insert zeros at the bottom, when in this mode, this might be the most beneficial setting you can get (because the ADC value would be ready for use as a fractional value).

Even if the lower bits are 'rubbish', you can always clear those bits after the min/max loop, so it won't really cause any slow-down.

-I decided to investigate things, and in UM10503, section 46.6.2 and section 46.6.4, for GDR and DRx, it says:

-So it's pretty clear: The result is aligned to the top of the 16-bit word. Your DMA should only transfer 16 bits from the DRx or GDR register.

The manual also mentions the following, which I believe is important in your case:

Remark: Use only the individual channel data registers DR0 to DR7 with burst mode or with hardware triggering to read the conversion results.

Thus the result is in the low 16 bits as follows (in binary): %RRRRRRRRRR000000, where R represents the 10-bit ADC Result.

So you don't need the AND or any bit-shifting; you get the fractional ADC result.

That means, when you've found your MIN and MAX values, you could multiply those values by 3.3 and divide by 65536.0, then you have the actual voltage (providing that the ADC reference voltage on the VDDA pin is 3.3V exactly.

If you prefer using integers (which is of course quicker), you can just multiply by 3300 and shift the result to the right 16 times, then you have millivolts. - but it should not be necessary to use integers in this case, as you'd most likely do that conversion on a PC, which is processing the captured data.

An AND operation will cost 1 clock cycle at least.

I will expect that it will stay at one clock cycle because the compiler should prepare the AND-mask before the loop starts.

The ADC, however, should always give you the same bit-values in the upper bits.

As far as I recall, the LPC4xxx can be configured to shift the bits to the top, which means you should be able to min/max those as most-significant instead of least-significant.

Thus you would not need to do any shifting or ANDing.

If the LPC4xxx always insert zeros at the bottom, when in this mode, this might be the most beneficial setting you can get (because the ADC value would be ready for use as a fractional value).

Even if the lower bits are 'rubbish', you can always clear those bits after the min/max loop, so it won't really cause any slow-down.

-I decided to investigate things, and in UM10503, section 46.6.2 and section 46.6.4, for GDR and DRx, it says:

-So it's pretty clear: The result is aligned to the top of the 16-bit word. Your DMA should only transfer 16 bits from the DRx or GDR register.

The manual also mentions the following, which I believe is important in your case:

Remark: Use only the individual channel data registers DR0 to DR7 with burst mode or with hardware triggering to read the conversion results.

Thus the result is in the low 16 bits as follows (in binary): %RRRRRRRRRR000000, where R represents the 10-bit ADC Result.

So you don't need the AND or any bit-shifting; you get the fractional ADC result.

That means, when you've found your MIN and MAX values, you could multiply those values by 3.3 and divide by 65536.0, then you have the actual voltage (providing that the ADC reference voltage on the VDDA pin is 3.3V exactly.

If you prefer using integers (which is of course quicker), you can just multiply by 3300 and shift the result to the right 16 times, then you have millivolts. - but it should not be necessary to use integers in this case, as you'd most likely do that conversion on a PC, which is processing the captured data.

Jens, more likely you referred to an outdated version of UM10503. Currently there is Rev. 2.1 of the document

LPC43xx/LPC43Sxx ARM Cortex-M4/M0 multi-core microcontroller User manual.

Sections 46.6.2 and 46.6.4 for A/D Global Data register and A/D Data Registers are now in 47.6.2 and 47.6.4.

The information you posted apply to ADC0 and ADC1 which are 400 ksps, 10-bit ADCs. Andrea is using the high-speed (up to 80 Msps) 12-bit ADC (ADCHS). ADCHS is in Chapter 48 of UM10503 Rev. 2.1.