Hi to you all,I've a firmware running on a NXP LPCLink2 (LPC4370: 204 Mhz Cortex M4 MCU) board which basically does this:
My problem is that my code is too slow, and every now and then and overwrite occurs.
Using the DMA I'm saving the ADC data, which I get in Twos complement format (Offset binary is also available), in a uint32_t buffer and try to prepare them for the CMSIS DSP function by converting the buffer into float32_t: here's where the overwrite occurs. It's worth saying that I'm currently using Floating point Software, not hardware.
The CMSIS library also accepts fractional formats like q31_t, q15_t and so on, and since I don't strictly need floating point maths I could even use these formats if that could save me precious time.It feels like I'm missing something important about this step, that's no surprise since this is my first project on a complex MCU, any help/hint/advise would be highly appreciated and would help me in my thesis.
I'll leave here the link for the (more datailed) question I asked in the NXP forums, just in case: LPC4370: ADCHS, GPDMA and CMSIS DSP | NXP Community .
Thanks in advance!
Regarding the sign extension, there is a very simple way to do it : change the scale of your data !
If I understood properly, your sample buffer holds 16-bits values in which 12 lowest significant bits are the ADC output value in 2-s complement and I expect you have 4x 0-bit in front (bits 15-12).
I would symbolize this sample pair like that : sample n (0x0SA1), sample n+1 (0x0SA2)
When you use *__SIMD32(pSrc), it loads a register with both samples (0x0SA20SA1), then you just need to shift left by 4 bits to have 0xSA20SA10 which is a pair of signed 16-bits values !
I you need to keep your samples for further computations, you can write back to memory with this new scale.
This would give something like :
uint32_t SearchMinMax16_DSP(int16_t* pSrc, int32_t pSize) { uint32_t data, min, max; int16_t data16; /* max variable will hold two max : one on each 16-bits half * same thing for min */ /* Load two first samples in one 32-bit access */ data = *__SIMD32(pSrc); /* put significant bits on bits 15-4 instead of 11-0 on each halfword */ data <<= 4; /* Write back to memory to have useable 16-bits samples, increment source pointer by a pair of samples */ *__SIMD32(pSrc)++ = data; /* Initialize Min and Max to these first samples */ min = data; max = data; /* decrement sample count */ pSize-=2; /* Loop as long as there remains at least two samples */ while (pSize > 1) { /* Load next two samples in a single access */ data = *__SIMD32(pSrc); /* put significant bits on bits 15-4 instead of 11-0 on each halfword */ data <<= 4; /* Write back to memory to have useable 16-bits samples, increment source pointer by a pair of samples */ *__SIMD32(pSrc)++ = data; /* Parallel comparison of max and new samples */ (void)__SSUB16(max, data); /* Select max on each 16-bits half */ max = __SEL(max, data); /* Parallel comparison of new samples and min */ (void)__SSUB16(data, min); /* Select min on each 16-bits half */ min = __SEL(min, data); pSize-=2; } /* Now we have maximum on even samples on low halfword of max * and maximum on odd samples on high halfword */ /* look for max between halfwords 1 & 0 by comparing on low halfword */ (void)__SSUB16(max, max >> 16); /* Select max on low 16-bits */ max = __SEL(max, max >> 16); /* look for min between halfwords 1 & 0 by comparing on low halfword */ (void)__SSUB16(min >> 16, min); /* Select min on low 16-bits */ min = __SEL(min, min >> 16); /* Test if odd number of samples */ if (pSize > 0) { data16 = *pSrc; /* put significant bits on bits 15-4 instead of 11-0 on low halfword */ data16 <<= 4; /* Write back to memory to have useable 16-bits sample */ *pSrc = data16; /* look for max between on low halfwords */ (void)__SSUB16(max, data16); /* Select max on low 16-bits */ max = __SEL(max, data16); /* look for min on low halfword */ (void)__SSUB16(data16, min); /* Select min on low 16-bits */ min = __SEL(min, data16); } /* Pack result : Min on Low halfword, Max on High halfword */ return __PKHBT(min, max, 16); /* PKHBT documentation */ }
With proper optimization options, I expect this to be quite efficient.
Yes, this is quite efficient!
It might be possible to gain 2 extra clock cycles per iteration by further unrolling, eg. processing four 16-bit samples at a time.
-It requires reading the vaiues contiguously.
Eg. if the two load instructions are next to eachother, then a clock cycle will be saved.
Another clock cycle is saved on the branch, we're saving.
Explained in detail; this sequence will save 2 clock-cycles:
load : load: process : process : store : store : branch
This sequence will only save one clock-cycle:
load : process : store : load : process : store : branch
(the end of the while loop represents the branch)
Each time the unrolling doubles, 2 clock cycles are saved until there are not enough free registers.
If we keep the DMA buffer's size divisible by 16 or a higher power of two, we do not need the 'cleanup' for the remaining values.
That would make the code a little simpler and easier to maintain.
You're right. Now that you have a efficient computation technique, you still can improve the overall efficiency.
Usually, I try to let compiler do his job where he's good !
In fact, you need to wonder what you can do to help him generate efficient code:
I made quite a detailed about this analysis on my blog (Simplest algorithm ever).
In the end :
- try to fix everything you can at compile time (bit shift count, buffer size, loop count ...)
- limit code visibility to what's necessary (using static functions will allow inlining optimizations inside a module), same for variables, do not use module variables (placed in RAM) when only local variables can be used
As demonstrated in my post, this will let you write safe code and allow compiler to get rid of unused parts !
All of this is only true when you need to reach best efficiency and can afford to turn compiler optimizations ON and very high !!
Before Andrea posted what he is doing with the samples, this is not an advisable trick. Now that finding the minimum and maximum values seems the only task to be done, left-shift/change of scale is a simple but effective way of sign extension.
For this project, writing a custom function for searching the minimum and maximum values rather than using the CMSIS functions is more advantageous. This is because the input samples need to be sign-extended first and the search for minimum and maximum values can be combined in a single function.
Thank you Thibaut for your detailed answers.I studied and evaluated your code today and I got good results: it took roughly 22.5us for 128 32bit-data, so, correct me if I'm wrong, actually 256 samples! That's the same time it took with the previous implementation and without the bit shifting.
Usually, I try to let compiler do his job where he's good !In fact, you need to wonder what you can do to help him generate efficient code:I made quite a detailed about this analysis on my blog (Simplest algorithm ever).In the end : - try to fix everything you can at compile time (bit shift count, buffer size, loop count ...) - limit code visibility to what's necessary (using static functions will allow inlining optimizations inside a module), same for variables, do not use module variables (placed in RAM) when only local variables can be used
Thanks for this hints, I read the article you linked and now I think I better understand this new (to me of course) way to program your are showing: I feel like I need to study *a lot*. I just wonder how I can get those nice compiler outputs in GCC/LPCXpresso (which is actually a forked version of Eclipse).
Thanks again for your help! Now I'm going to close this post, but it was nice and helpful. Unfortunately I can choose just one correct answer, but I'd like to thank you all (once again) for what you are doing here. Lovely community.