Hi everyone,
I am trying to configure a TZASC (TZC380) in my secure kernel to prevent Linux and some DMA to mess with the secure part of DRAM.
In the documentation, the FAIL ID register holds the identifier of the faulty master. The id n = AID_WIDTH-1 bit long, and represent the master AXI ID.
Where can I find the value of AID_WIDTH and a table listing the possible master AXI ID ?
Best regards,
Vincent
PS: if this is relevant, the target boards are based on iMX6q/iMX7d
Update: some information can be found here: TZC380 on iMX6Q/7D: AXI ID and AID_WIDTH | NXP Community
Still there are some missing part, about AID_WIDTH mainly.
@vsiles -- it's a good bet that AID_WIDTH is 14 just because that's the ID width "at the DDR controllers" and the TZASC component documentation in the i.MX6 manuals dictate that it is the last component (barring bridges and suchlike) before the actual AXI slave interface to the DDR controller. Either way it doesn't matter what the width is -- the top bits (31:n) are going to be 0 in the TZASC so you can just read a number out. Depending on the bottom bits, you can determine the original source -- if they're 0'b000 or 0'b001 then the source was the ARM PL310 slave ports. 100 or 101, then IPU1 or IPU2. If it's 010 then it's one of GPU, VDOA, HDMI (and you can go and differentiate them from the rest of the bits).
It might be a complicated switch/case statement to filter each of them down but they will always be unique (apart from the interconnect rewriting of xxx parts, but they will be unique and differentiable, still) within the definition, not only because the documents specifically state that it would be so, but because the AMBA specification absolutely requires all master IDs to be unique to the master.
Once again, thank you very much for the detailed explanation.
Best,