M33 parallel trace clock

Hi, 

I have a few question regrading the parallel trace in the M33:

1. Does the TPIU_ACPR.SWOSCALER field affect the parallel trace port.
   It seems it should if TPIU_DEVID.CPPT is 1.
   Is there a way to change the TPIU_DEVID.CPPT value in the M33 instantiation, i.e., via the teal files?
2. Can the parallel trace clock input, TRACECLKIN, be divided externally to the M33?
   If so, how does it correlate to the M33 core frequency which executes instruction at full, undivided frequency