S-suffix in ARM Cortex M7 IT block

This code:

ands r11, #0x01

ite eq

movseq r11, #33

movsne r11, #41

for me always comes out with r1 = 41 even with bit 0 = 0 at the beginning

GCC asm produces this list snippet:

3116: f01b 0b01 ands.w fp, fp, #1

311a: bf0c ite eq

311c: f05f 0b21 movseq.w fp, #33 @ 0x21

3120: f05f 0b29 movsne.w fp, #41 @ 0x29

While this one works as expected:

ands r11, #0x01

ite eq

moveq r11, #33

movne r11, #41

cmp r11, #0

with this GCC asm output:

3116: f01b 0b01 ands.w fp, fp, #1

311a: bf0c ite eq

311c: f04f 0b21 moveq.w fp, #33 @ 0x21

3120: f04f 0b29 movne.w fp, #41 @ 0x29

3124: f1bb 0f00 cmp.w fp, #0

( I need to have Z cleared after these lines)

Can someone explain or point me to a mistake I made?