Dynamic Core Management via Arm's PSCI on OdroidC4

I have been creating a basic core management tool which is able to dynamically turn CPU cores on and off using Arm's PSCI CPU_ON and CPU_OFF functions. This worked great on QEMU, however moving onto real hardware (particularly an OdroidC4), turning the core back on didn't work.

When I attempt to turn a core on, it is stuck in the "PENDING" state which can be seen via the AFFINITY_INFO PSCI function. It seems like the entry_point given to CPU_ON is just not being called on the OdroidC4. Below is a code snippet of the function I am trying to get CPU_ON to call. It simply writes into UART, however, I do not see this output.

#define UART_WFIFO              0x00

BEGIN_FUNC(bootstrap_start)
    movz x0, #0xff80, LSL #16
    movk x0, #0x3000

    mov w2, #'\n'
    str w2, [x0, #UART_WFIFO]
    mov w3, #'B'
    str w3, [x0, #UART_WFIFO]
    mov w4, #'\n'
    str w4, [x0, #UART_WFIFO]

    ret
END_FUNC(bootstrap_start)

The bootstrap_start function is located at 0x10_000_000 in physical memory. This all worked on QEMU, but happened to break moving to the OdroidC4. Anybody know why this might be happening or how to debug this if I don't have access to GDB?