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Dear Arm Experts,
Recently we came across an issue regarding Cortex-R52+ External abort pending:
During download and debug, the ISR (Interrupt Status Register) A (External abort pending bit) will be set after loading the flash loader (which is used for flash programming) to RAM:
The flash could be successfully programmed. However, when trying to run, it will trigger abort and corresponding DFSR (Data Fault Status Register) will be as following:
Could you kindly help to analyze the possible situation which will set the ISR (Interrupt Status Register) A (External abort pending bit)?
Thanks very much!
Best Regards,
Changjiang