How to Define msi_msg for Software-Generated Interrupts with GICv3 ITS? (linux kernel 6.12.y)

hello, everyone

I am testing dummy platform device lpi in linux kernel 6.12.y

I posted How to mapping MSI (LPIs) in Linux kernel 6.12.y ? - Architectures and Processors forum - Support forums - Arm Community.

After my previous post, I was able to create a dummy device and successfully complete ITS mapping.
With a Trace32 debugger, I also managed to manually issue ITS commands and trigger the MSI handler.

Now, I’d like to generate interrupts from software during normal kernel runtime.

My idea is to use the irq_chip function pointer to repeatedly generate MSIs, as shown below:

if (list->msi_opt->chip) {
    for (ntimes = 0; bench_times > ntimes; ntimes++) {
        list->msi_opt->chip->irq_write_msi_msg(list->msi_opt->data, &generic_msg);
    }
}

My questions are about struct msi_msg:

  1. I see that PCIe devices also use msi_msg. For a dummy platform device, should I still treat it as if it were a PCIe endpoint when constructing msi_msg?

  2. How should I define valid values for msi_msg (e.g., address_hi/lo and data) in a GICv3 ITS setup?

  3. Is there a recommended helper or example in the kernel for composing a correct msi_msg for a given IRQ/domain?

Any guidance or pointers would be greatly appreciated. Thank you!

+++

I tried:

struct msi_msg generic_msg = {
    .address_lo = 0xa00a0000,
    .address_hi = 0x1,
    .data = 0x1,
};

struct msi_msg generic_msg = {
    .address_lo = 0x0,
    .address_hi = 0x0,
    .data = 0,
};

  • Disclaimer: I am in no way a Linux kernel expert

    On the GIC part of the question, if software wants to generate an LPI via the ITS it should do so by issuing an INT command via the ITS Command Queue.  It's not expected that software generates an MSI to the GITS_TRANSLATER register the way a device would, and in some systems it might not be possible.