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Hi ARM experts,
I am looking ARMv9/GIC-v4/CI-700 and DSU-120 doc, and wondering if SMP kernel (say, Linux) can run smoothly on the cores with a multi-cluster configuration below.
#1. One GIC-700 with two GCI (GIC cluster interface), one for CPU cluster0, another for cluster1.
#2. Two CPU clusters, 4 cores per cluster.
#3. CPU clusters connected to CI-700 as RN-F.
My questions are:
#1. Could Linux can run on these 8 cores in a SMP way? If yes, any limitations? Any changes needed to the kernel for the smooth running?
#2. Given there is only one GICD, we may have to trap GICD access into Hypervisor? Otherwise kernel must be hacked to access GICD in a exclusive way (by a global monitor for instance)?
#3. We have to change some linux code to mark some data structure (such as spinlock, task struct which are used for task transfer between cores) as outer shareable.
Thanks