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Reading through the TRM for Cortex-M7 about speculative access, it looks like the core would issue speculative read from DTCM region.
If the DMA is moving data from outside into DTCM, then core does data process on them, how to I clear (or "invalidate") the data that has already been speculatively read into the core?
It seems to me that a sequence of "dsb then isb" should flush the core pipeline, thus causing the core to re-read those from the DTCM address, but I'm not sure I understand this correctly.
Could I get some confirmation whether this is possible, and how should I do it properly?