Inquiry: Does ARM Errata ID 838869 apply to Cortex-M7?

I’m investigating whether ARM Errata ID 838869 (“Store immediate overlapping exception return operation might vector to incorrect interrupt”) affects Cortex-M7 silicon, in addition to the documented Cortex-M4/M4F cores. Here’s what I’ve found so far:

1. ARM SDEN-1068427 (Cortex-M7 Errata Notice v11.0, May 28 2024)
   The official ARM Software Developer’s Errata Notice for Cortex-M7 does not list ID 838869 in its summary table.
   PDF: https://documentation-service.arm.com/static/665dff778ad83c4754308908?token=

2. STMicroelectronics STM32H7 Errata (ES0445 Rev 5, September 2024)
   In ST’s device errata sheet, 838869 appears only under the “Arm 32-bit Cortex-M4 core” section, and is not listed under “Cortex-M7 core.”
   PDF: https://www.st.com/resource/en/errata_sheet/es0445-stm32h7x7errata.pdf

3. NXP MCUXpresso SDK (release 25.03.00)
   Despite the above, the MCUXpresso fsl_common_arm.h driver uses:
   
   /*! @name ISR exit barrier
   * @{
   *
   * ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
   * exception return operation might vector to incorrect interrupt.
   * For Cortex-M7, if core speed much faster than peripheral register write speed,
   * the peripheral interrupt flags may be still set after exiting ISR, this results to
   * the same error similar with errata 83869.
   */
   #if (defined __CORTEX_M) && ((__CORTEX_M == 4U) || (__CORTEX_M == 7U))
   #define SDK_ISR_EXIT_BARRIER __DSB()
   #else
   #define SDK_ISR_EXIT_BARRIER
   #endif
   
   implying NXP applies a DSB barrier at ISR exit on both M4 and M7 cores.
   Source: https://github.com/nxp-mcuxpresso/mcuxsdk-core/blob/release/25.03.00/drivers/common/fsl_common_arm.h#L369-L383
   
   

My questions:

• Has ARM observed or documented any Cortex-M7 devices actually affected by errata 838869?

• If not, can you confirm that adding __DSB() on M7 is purely a precaution against slow peripheral‐write latency rather than compensating for a core bug?

• Are there any unpublished or upcoming M7-specific errata we should be aware of?

Thanks in advance for any clarification or pointers!