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AXI Atomic Access

Deepak

Hello,

I don't know whether this question has been asked or not. If yes please direct me to the appropriate discussion.

My question is:

1. Suppose there are two masters, M0, M1 and one slave, S0. M0 initiates an Exclusive access to S0 and gets the response as EXOKAY. M1 initiates a normal access to S0 for the same address as M0. As far as my understanding goes M1 will receive a response as OKAY, is it correct? If no does M0 looses its exclusivity?. Under what circumstances will M0 loose its exclusive access.? Is it when M1 initiates an exclusive access to  the same address as M0 or to a different address.(Assuming slave is capable to monitor only 1 address during an exclusive access)

2. How different is Exclusive access as compared to Normal Access. I know that Exclusive Access mainly helps with semaphore type operations. Please provide me with an detailed explanation as to how exactly this happens?

3. When a master initiates a locked access, the entire slave is dedicated to that master (AXI3). From the AXI3 specs, Locked Access can allow only 2 transactions. Is it one locked and next one unlocked? If yes than what purpose does this serve with respect to processor. ? I am trying to understand the locked access behavior.

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    (1).  The name, exclusive, is perhaps not the best.

    Taking a step back, what does software use exclusive accesses for?

    LDREX [X] - Read from addr X, with "exclusive"

    STREX [X] - Store to addr X _IF_ it has not been written to since the LDREX

    Going back to the bus.  The initial exclusive load sets up an exclusive monitor (either in the interconnect or the slave itself).  This tags the address and records which master did the access.  When the exclusive store is performed, it succeeds only if the "tag" is still present.

    What would clear the tag?  Another master writing to the tagged location.  It's up to monitor implementation how granular it is, but typically in the order of a cache line.  So a write to a different address within the same slave probably wouldn't have removed the tag.

    In this way, the "exclusive" doesn't actually stop another master writing to the slave or address.  It's just a way of checking that no has written an address since you read it.

    (2) Mutexes and semaphores are good example:

    • Read mutex, see that it's "free"
      • Done using an exclusive load, thereby setting up monitor
    • Attempt to gain the mutex
      • Done using an exclusive store.

    In the time between the read and write, it's possible another master grabbed the mutex.  The "exclusive" load and store let you detect this situation, and hence know that the mutex lock attempt failed.

    (3) Locked transfers really do prevent another master from accessing a location for the duration of the lock.  I believe that they are only used for SWP instructions.  Which atomically swaps the contents of a register and a memory location.

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  • 0

    (1).  The name, exclusive, is perhaps not the best.

    Taking a step back, what does software use exclusive accesses for?

    LDREX [X] - Read from addr X, with "exclusive"

    STREX [X] - Store to addr X _IF_ it has not been written to since the LDREX

    Going back to the bus.  The initial exclusive load sets up an exclusive monitor (either in the interconnect or the slave itself).  This tags the address and records which master did the access.  When the exclusive store is performed, it succeeds only if the "tag" is still present.

    What would clear the tag?  Another master writing to the tagged location.  It's up to monitor implementation how granular it is, but typically in the order of a cache line.  So a write to a different address within the same slave probably wouldn't have removed the tag.

    In this way, the "exclusive" doesn't actually stop another master writing to the slave or address.  It's just a way of checking that no has written an address since you read it.

    (2) Mutexes and semaphores are good example:

    • Read mutex, see that it's "free"
      • Done using an exclusive load, thereby setting up monitor
    • Attempt to gain the mutex
      • Done using an exclusive store.

    In the time between the read and write, it's possible another master grabbed the mutex.  The "exclusive" load and store let you detect this situation, and hence know that the mutex lock attempt failed.

    (3) Locked transfers really do prevent another master from accessing a location for the duration of the lock.  I believe that they are only used for SWP instructions.  Which atomically swaps the contents of a register and a memory location.

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