Hello folks:
Currently, we are using r52+ with 3 cluster (two core in per cluster) + DCLS.
As we know the R52+ using the GICv3, and the GIC distributor should be shared with all CPU cluster on Arm v8-A series,
is it same GIC typology in Armv8-R (R52+) ? which means in R52+:
Q: There is a GICD shared with all the cluster
or
Q: per cluster has there's own GICD
By the way, we are enable the DCLS
Thanks
ShihHsun Chang said:the GIC distributor should be shared with all CPU cluster on Arm v8-A series,
The expectation is that all the A-profile CPUs that will run the same instance of a software stack (e.g. Linux as the host OS) are connected to the same GIC. Having the CPUs share a single GIC makes management simpler for the host OS/hypervisor. A system might contain multiple sub-systems, with each sub-system running a different software stack instance, in which case I'd expect a GIC per sub-system. I mention this because I think it factors into your question.
I don't believe there is an option for multiple Cortex-R52+ clusters to share a single GIC. But then, I'd also not expect you run one instance of a host OS across multiple Cortex-R52 clusters due to the lack of cache coherency.
Hi Martin
Thanks for reply, so you mentioned that for multiple cortex-r52+ cluster, there is single GIC"D" (distributor) for every cluster ? right ?
because as I know GIC"D" is shared with all cluster in armv8-A, and GIC"R" and CPU interface is per-single core