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Hi, in A3.5.1 section of IHI0022K pdf, I found two statements as follows:1.The Manager must not wait for the Subordinate to assert AWREADY or WREADY before asserting AWVALID or WVALID. This applies to every write data transfer in a transaction.
2. The Subordinate can wait for AWVALID or WVALID, or both, before asserting AWREADY.
but in the figure as follows:
at T2,the axi master asserted WVALID when AWREADY is asserted, namely, the axi master wait for the axi slave to assert AWREADY before asserting WVALID. Does this contradict the content described in the first point?
Thanks very much!
Hi, I have moved your question to the Architectures and Processors forum.