R52+ vldr does not load the data

Hi

We are using Cortex-R52+ as followings

float32 test = 123.3f;  the value of the variable is not changed.

We found that sometimes if(test<123.0f) will tells true and make err_cnt++.

At that time, I reads the S15 and it has a legacy value. I suspect that the legacy value in S15 is due to other floating-point calculation and it seems that the vldr does not load the value from [r3] to S15.

Could you help give the possible reasons ? Or is there any limitation for the floating-point calculation ?

BR, Grace

Parents
  • Hi 

    In our application, if(test<123.0f) is in the Os task and there are some floating-point calculation in the interrupt callback. So we suspect that sometimes when executing if(test<123.0f), ISR comes and interrupts the task. The ISR callback updates the floating-point registers but w/o push/pop stack. We add VPUSH {D0-D15} in the beginning of the ISR callback and VPOP {D0-D15} in the end of the callback. After some tests, the issue does not happen. I want to confirm that is "VPUSH {D0-D15} and "VPOP {D0-D15}" enough, does it need to push/pop fcpsr and does it need to add some barrier instructions ?

    BR, Grace

Reply
  • Hi 

    In our application, if(test<123.0f) is in the Os task and there are some floating-point calculation in the interrupt callback. So we suspect that sometimes when executing if(test<123.0f), ISR comes and interrupts the task. The ISR callback updates the floating-point registers but w/o push/pop stack. We add VPUSH {D0-D15} in the beginning of the ISR callback and VPOP {D0-D15} in the end of the callback. After some tests, the issue does not happen. I want to confirm that is "VPUSH {D0-D15} and "VPOP {D0-D15}" enough, does it need to push/pop fcpsr and does it need to add some barrier instructions ?

    BR, Grace

Children
No data