Hi,
We are using TI-AWR294x
As per the reference manual,
From CCSIR it is clear that it supports 16KB.
But how to make use of complete 16KB, no where we see an option to select it. All other registers are read only. By default it selects L1 cache and it shows 4KB.
Before enabling cache we also tried to overwrite CSOR (8KB for data, 8KB for instruction)as shown below, but still no change.
mov r1, #0x11mcr p15, #0, r1, c15, c14, #0
And one input needed in the Register CSSELR, it mentions either of the cache can be selected. so how to select both.
Regards,
Pragathi Simha