PMU Event logging overhead on Cortex R4 CPU

Manan Dixit said:

Hi Team,

Test Scenario:

I am using a  single core Cortex R4 processor for Modem and running a moderate throughput test case with Sleep Disable.

I am capturing below 3 PMU events and CPU cycle counter for 10secs of the test scenario.

PMU Events : 0x06 (Data Read), 0x07 (Data Write), 0x43 (External Access Request)

I am capturing data like below:

1. Run the Throughput test case for 100secs.

2. After 100 secs enable the PMU events.

3. After 10secs, store the 3 PMU events.

Observation:

1. Before Step2, CPU idle Ratio is ~50%.

2. After Step2, CPU idle ratio has decreased to ~17%.

I am able to get the PMU data successfully.

P.S.: There is no change in workload between Step1 and Step2.

Query:

- We see a degradation in CPU idle of ~33% after enabling the PMU events.

1. Could you please help to explain, how PMU event enabling is causing the degradation in CPU idle, and if above decrease is normal?

2. Is the impact of PMU event capturing on CPU also related to which events we are capturing?

Thanks and Regards,

Manan Dixit

Hello, Be Ball Players

I would like to answer about your first question, the degradation in CPU idle after enabling the PMU events is likely due to the increased number of PMU overflow interrupts that occur when the selected events reach the sampling period. These interrupts cause the CPU to switch context and handle the interrupt service routine, which consumes CPU cycles and reduces the idle time. This decrease may be normal depending on the sampling rate and period you set, but you should be careful not to introduce too much overhead or skid. 

Answer of Second question is, the impact of PMU event capturing on CPU may also be related to which events you are capturing, as some events may be more frequent or costly then others. 

I hope this helps you understand the PMU event logging overhead on Cortex R4 CPU better. 

Best regards, 
Latonya Dodson

Manan Dixit said:

Hi Team,

Test Scenario:

I am using a  single core Cortex R4 processor for Modem and running a moderate throughput test case with Sleep Disable.

I am capturing below 3 PMU events and CPU cycle counter for 10secs of the test scenario.

PMU Events : 0x06 (Data Read), 0x07 (Data Write), 0x43 (External Access Request)

I am capturing data like below:

1. Run the Throughput test case for 100secs.

2. After 100 secs enable the PMU events.

3. After 10secs, store the 3 PMU events.

Observation:

1. Before Step2, CPU idle Ratio is ~50%.

2. After Step2, CPU idle ratio has decreased to ~17%.

I am able to get the PMU data successfully.

P.S.: There is no change in workload between Step1 and Step2.

Query:

- We see a degradation in CPU idle of ~33% after enabling the PMU events.

1. Could you please help to explain, how PMU event enabling is causing the degradation in CPU idle, and if above decrease is normal?

2. Is the impact of PMU event capturing on CPU also related to which events we are capturing?

Thanks and Regards,

Manan Dixit

Hello, Be Ball Players

I would like to answer about your first question, the degradation in CPU idle after enabling the PMU events is likely due to the increased number of PMU overflow interrupts that occur when the selected events reach the sampling period. These interrupts cause the CPU to switch context and handle the interrupt service routine, which consumes CPU cycles and reduces the idle time. This decrease may be normal depending on the sampling rate and period you set, but you should be careful not to introduce too much overhead or skid. 

Answer of Second question is, the impact of PMU event capturing on CPU may also be related to which events you are capturing, as some events may be more frequent or costly then others. 

I hope this helps you understand the PMU event logging overhead on Cortex R4 CPU better. 

Best regards, 
Latonya Dodson