Hello. I have a Cortex-A15 revision r2p4 and I'm trying to access the Revision ID register, REVIDR
There doesn't appear to be a Technical Reference Manual for revision r2p4, so I'm looking at the manual for r2p1.
There seems to be some inconsistency...
https://developer.arm.com/documentation/ddi0438/d/System-Control/Register-summary/c0-registers?lang=en
The table on the above page claims that REVIDR is accessed by CRm=c1 and Op2=6
CRm=c1 and Op2=6
https://developer.arm.com/documentation/ddi0438/d/System-Control/Register-descriptions/Revision-ID-Register?lang=en
But this pages suggests that CRm=c0
To access the REVIDR, read the CP15 register with:MRC p15, 0, <Rt>, c0, c0, 6; Read Revision ID Register
MRC p15, 0, <Rt>, c0, c0, 6; Read Revision ID Register
I presume that CRm=c0 is the correct parameter. Is that right?
I need to read the register to determine if Cortex-A15 silicon errata 799271 and 801819 apply to my chip, so I want to make sure I'm getting it right.
Following the link in table 4.2, the description the TRM gives the register says:
As that matches the architectural register description, it looks like the table is wrong.
EDIT: Also, looking at the r3p0 version of the TRM - the table got fixed:
developer.arm.com/.../c0-registers
Thanks Martin. Good to have that confirmed.