Hi,
In an ARM v8m mainline processor if the processor is servicing one interrupt and meanwhile another two interrupts come and have same priority subgroup and the late arrived interrupt have higher priority. Which interrupt will be serviced first after the execution of current interrupt. The first arrived or late arrived with higher priority. All the interrupts are in same subgroup.
Thanks in advance,
Eldhose
Hi there, I have moved your question to the Architectures and Processors forum. Many thanks.
The higher priority one will take precedence.
For the others, the one with the lower number will then take precedence.
https://developer.arm.com/documentation/100701/0200/Exception-properties